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Parallel Logic Programs on the Mayfly

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Parallel Logic Programs on the Mayfly
Id. 45682583
Idioma inglés
Titulo Parallel Logic Programs on the Mayfly
Autor(es) John S. Conery
Localización http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.101.8054
Versión 1.0
Estado Final
Descripción Abstract. The Mayfly, a parallel processor being built at HP Labs in Palo Alto, has architectural support for several important aspects of the OM virtual machine for parallel logic programs. Each node has an extra processor that is able to relieve the main processor of a significant amount of the “housekeeping ” work of memory management, task switching, and message handling. This paper describes how the second processor implements kernel level functions in OM, with particular attention to the operations that support task switching and task allocation. The paper includes detailed timing data from a program with interleaved parallel threads to show that while the main processor is busy in one thread the kernel processor can effectively build the context for the next thread, significantly reducing task switching time.
Tipo application/pdf
Palabras clave logic programming
Tipo de recurso Texto Narrativo
Tipo de Interactividad Expositivo
Nivel de Interactividad muy bajo
Audiencia Estudiante
Profesor
Autor
Estructura Atomic
Coste no
Copyright
Metadata may be used without restrictions as long as the oai identifier remains attached to it.
Formatos application/pdf
Requerimientos técnicos Browser: Any
Relación [IsBasedOn] http://www.cs.uoregon.edu/~conery/PDF/ConeryLASC92.pdf
Fecha de contribución 26-sep-2009
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