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Decision Diagrams And

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Marcadores Sociales
Decision Diagrams And
Id. 46355600
Idioma inglés
Titulo Decision Diagrams And
Autor(es) Pass Transistor Logic
V. Bertacco
V. Bertacco
V. Bertacco
S. Minato
S. Minato
S. Minato
P. Verplaetse
P. Verplaetse
P. Verplaetse
L. Benini
L. Benini
L. Benini
G. De Micheli
G. De Micheli
G. De Micheli
Localización http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.3.5062
Versión 1.0
Estado Final
Descripción Since the relative importance of interconnections increases as feature size decreases, standardcell based synthesis becomes less e#ective when deep-submicron technologies become available. Intra-cell connectivity can be decreased by the use of macro-cells. In this work we present methods for the automatic generation of macro-cells using pass transistors and domino logic. The synthesis of these cells is based on BDD and ZBDD representations of the logic functions. We address speci #c problems associated with the BDD approach #level degradation, long paths# and the ZBDD approach #sneak paths, charge sharing, long paths#. We compare performance of the macro-cells approachversus the conventional standard-cell approach based on accurate electrical simulation. This shows that the macro-cells perform well up to a certain complexity of the logic function. Functions of high complexitymust be decomposed into smaller logic blocks that can directly be mapped to macro-cells.
Tipo application/pdf
Palabras clave logic synthesis
Tipo de recurso Texto Narrativo
Tipo de Interactividad Expositivo
Nivel de Interactividad muy bajo
Audiencia Estudiante
Profesor
Autor
Estructura Atomic
Coste no
Copyright
Metadata may be used without restrictions as long as the oai identifier remains attached to it.
Formatos application/pdf
Requerimientos técnicos Browser: Any
Relación [IsBasedOn] http://chronos.stanford.edu/users/nanni/publications/archive/./1997/CSL-TR-97-748.pdf
[References] 10.1.1.113.9465
Fecha de contribución 24-jul-2009
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