Modelling Digital Logic in SDL
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Modelling Digital Logic in SDL
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| Id. |
46628351 |
| Idioma |
inglés
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| Titulo |
Modelling Digital Logic in SDL |
| Autor(es) |
Tadanori Mizuno
Norio Shiratori
Teruo Higashino
G. Csopaki
K. J. Turner
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| Localización |
http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.47.2459
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| Versión |
1.0 |
| Estado |
Final
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| Descripción |
The specification of digital logic in SDL (Specification and Description Language) is investigated. A specification approach is proposed for multi-level descriptions of hardware behaviour and structure. The modelling method exploits features introduced in SDL-92. The approach also deals with the specification, analysis and simulation of timing aspects at any level in the specification of digital logic. Keywords: Digital Logic, Hardware Design, SDL (Specification and Description Language), Timing Analysis. FORTE/PSTV Codes: I.1, I.3, I.4, I.7, I.8, I.9, II.3, IV.1. 1. Introduction 1.1 Application of SDL This paper addresses the specification and validation of digital logic components and digital systems using SDL-92 (Specification and Description Language [1,2,3]). SDL was developed by CCITT/ITU-T in the context of telecommunications. ETSI (European Telecommunications Standards Institute) has defined a methodology for preparing standards and reports that describe certain kinds of s...
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| Tipo |
application/postscript
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| Palabras clave |
Digital Logic
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| Tipo de recurso |
Texto Narrativo
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| Tipo de Interactividad |
Expositivo
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| Nivel de Interactividad |
muy bajo
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| Audiencia |
Estudiante
Profesor
Autor
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| Estructura |
Atomic |
| Coste |
no
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| Copyright |
sí
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Metadata may be used without restrictions as long as the oai identifier remains attached to it. |
| Formatos |
application/postscript
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| Requerimientos técnicos |
Browser: Any
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| Relación |
[IsBasedOn] ftp://ftp.cs.stir.ac.uk/pub/staff/kjt/research/pubs/log-sdl.ps.gz
[References] 10.1.1.50.3647
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| Fecha de contribución |
31-jul-2009 |
| Contacto |
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