Architectural Specification and Simulation Through Rewriting-Logic
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Architectural Specification and Simulation Through Rewriting-Logic
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| Id. |
47125368 |
| Idioma |
inglés
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| Titulo |
Architectural Specification and Simulation Through Rewriting-Logic |
| Autor(es) |
Mauricio Ayala-Rincon Departamento
Carlos H. Llanos
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| Localización |
http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.61.5441
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| Versión |
1.0 |
| Estado |
Final
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| Descripción |
In recent years Arvind's Group at MIT has shown the usefulness of term rewriting theory for the specification of processor architectures. In their approach processors specified by term rewriting systems are translated into a standard hardware description language for simulation purposes. In this work we present our current investigation on the use of Rewriting-Logic, which is a more powerful theoretical framework than pure rewriting, for specification and verification of processor architectures at a higher abstraction level. We adopt the rewriting-logic environment ELAN to specify and verify architectures without the need to resort to the details of hardware description languages for simulation purposes. Our investigation shows that simulation at rewriting-logic level may provide useful insights to guide the architectural design.
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| Tipo |
application/postscript
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| Palabras clave |
Rewriting-logic
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| Tipo de recurso |
Texto Narrativo
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| Tipo de Interactividad |
Expositivo
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| Nivel de Interactividad |
muy bajo
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| Audiencia |
Estudiante
Profesor
Autor
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| Estructura |
Atomic |
| Coste |
no
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| Copyright |
sí
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Metadata may be used without restrictions as long as the oai identifier remains attached to it. |
| Formatos |
application/postscript
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| Requerimientos técnicos |
Browser: Any
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| Relación |
[IsBasedOn] http://www.mat.unb.br/%7Eayala/sbac0702.ps
[References] 10.1.1.31.2833
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| Fecha de contribución |
25-ago-2009 |
| Contacto |
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