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Abstract In recent years Arvind's Group at MIT has shown theusefulness of term rewriting theory for the specification of processor architectures. In their approach processors spec-ified by term rewriting systems are translated into a standard hardware description language for simulation pur-poses. In this work we present our current investigation on the use of Rewriting-Logic, which is a more powerful theo-retical framework than pure rewriting, for specification and verification of processor architectures at a higher abstrac-tion level. We adopt the rewriting-logic environment ELAN to specify and verify architectures without the need to resortto the details of hardware description languages for simulation purposes. Our investigation shows that simulationat rewriting-logic level may provide useful insights to guide the architectural design. Keywords: Rewriting-logic, High Level Specification andSimulation, Design Environment. 1

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Autor(es)

Carlos H. Llanosiesb - 

Id.: 47276931

Idioma: inglés  - 

Versión: 1.0

Estado: Final

Tipo:  application/postscript - 

Tipo de recurso: Texto Narrativo  - 

Tipo de Interactividad: Expositivo

Nivel de Interactividad: muy bajo

Audiencia: Estudiante  -  Profesor  -  Autor  - 

Estructura: Atomic

Coste: no

Copyright: sí

: Metadata may be used without restrictions as long as the oai identifier remains attached to it.

Formatos:  application/postscript - 

Requerimientos técnicos:  Browser: Any - 

Relación: [IsBasedOn] http://www.mat.unb.br/~ayala/sbac0702.ps
[References] 10.1.1.31.2833

Fecha de contribución: 28-ago-2009

Contacto:

Localización:

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