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This paper describes results on Built-In Current Sensors destined to overcome the limitations of IDDQ testing in deep submicron circuits. The problems of performance penalty, test accuracy and test speed are addressed. A new sensor composed of a source-controlled comparator operating at low supply voltages and bias currents is used. Gradual sensor activation ensures reliable low noise operation. It is combined with large bypass MOS switches avoiding performance penalty, as well as a second bypass and compensation logic to increase test speed.

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Calin , T. -  Anghel , L. -  Nicolaidis , M. - 

Id.: 71313774

Idioma: inglés  - 

Versión: 1.0

Estado: Final

Palabras clavePACS 85 - 

Cobertura:  Dana Point, California , United States - 

Tipo de recurso: info:eu-repo/semantics/conferenceObject  -  Conference papers  - 

Tipo de Interactividad: Expositivo

Nivel de Interactividad: muy bajo

Audiencia: Estudiante  -  Profesor  -  Autor  - 

Estructura: Atomic

Coste: no

Copyright: sí

Requerimientos técnicos:  Browser: Any - 

Relación: [IsBasedOn] 17TH IEEE VLSI Test Symposium
[IsBasedOn] 17TH IEEE VLSI Test Symposium
[IsBasedOn] https://hal.archives-ouvertes.fr/hal-00005845
[IsBasedOn] 17TH IEEE VLSI Test Symposium, 1999, Dana Point, California, United States. IEEE Computer Society, pp.135-42, 1999, 〈10.1109/VTEST.1999.766657〉
[References] info:eu-repo/semantics/altIdentifier/doi/ 10.1109/VTEST.1999.766657

Fecha de contribución: 17-may-2018


* hal-00005845
* DOI : 10.1109/VTEST.1999.766657

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