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Detalles del recurso


Prolonged 500 degrees Celsius to 700 degrees Celsius electrical testing data from 4H-SiC junction field effect transistor (JFET) integrated circuits (ICs) are combined with post-testing microscopic studies in order to gain more comprehensive understanding of the durability limits of the present version of NASA Glenn's extreme temperature microelectronics technology. The results of this study support the hypothesis that T 500 degrees Celsius durability-limiting IC failure initiates with thermal-stress-related crack formation where dielectric passivation layers overcoat micron-scale vertical features including patterned metal traces.

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NASA Technical Reports Server (NTRS)  


Chen, Liangyu -  Spry, David J. -  Neudeck, Philip G. -  Lukco, Dorothy -  Beheim, Glenn M. -  Chang, Carl W. - 

Id.: 69714108

Versión: 1.0

Estado: Final

Tipo:  application/pdf - 

Palabras claveElectronics and Electrical Engineering - 

Cobertura:  Unclassified, Unlimited, Publicly available - 

Tipo de recurso: GRC-E-DAA-TN35563  -  European Conference on Silicon Carbide and Related Materials (ECSCRM) 2016; 25-29 Sep. 2016; Halkidiki; Greece  - 

Tipo de Interactividad: Expositivo

Nivel de Interactividad: muy bajo

Audiencia: Estudiante  -  Profesor  -  Autor  - 

Estructura: Atomic

Coste: no

Copyright: sí

: Copyright, Distribution as joint owner in the copyright

Formatos:  application/pdf - 

Requerimientos técnicos:  Browser: Any - 

Relación: [IsBasedOn] CASI

Fecha de contribución: 12-mar-2017



Otros recursos del mismo autor(es)

  1. 500 C Electronic Packaging and Dielectric Materials for High Temperature Applications High-temperature environment operable sensors and electronics are required for exploring the inner s...
  2. Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconne...
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  4. Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconne...
  5. First-Order SPICE Modeling of Extreme-Temperature 4H-SiC JFET Integrated Circuits A separate submission to this conference reports that 4H-SiC Junction Field Effect Transistor (JFET)...

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