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Nomenclatura Unesco > (22) Física > (2203) Electrónica > (2203.02) Elementos de circuitos

Categorías relacionadas:
(3307.03) Diseño de circuitos

Mostrando recursos 1 - 20 de 457

1. Deslocalización electrónica en cadenas metálicas lineales unidas por sistemas π-conjugados - Río, M. Pilar del; Revuelta, M. A.; López, Ana M.; Ciriano, Miguel A.; Tejel, Cristina
La posibilidad de utilizar moléculas individuales como dispositivos electrónicos autónomos ha supuesto, en los últimos años, un amplio desarrollo de nuevas líneas de investigación. La electrónica molecular plantea el diseño de circuitos en los que algunos de sus elementos constituyentes serían los denominados “cables moleculares”. Dicho término se utiliza para describir moléculas discretas capaces de conectar dos especies de manera que pueda producirse un transporte de carga a través de la molécula.Cadenas metálicas lineales de iridio, comúnmente conocidas como azules de iridio, son candidatas perfectas para dicho fin, ya que permiten la deslocalización electrónica a través de los átomos metálicosque...

2. Structure Optimization of a Grain Impact Piezoelectric Sensor and Its Application for Monitoring Separation Losses on Tangential-Axial Combine Harvesters - Liang, Zhenwei; Li, Yaoming; Zhao, Zhan; Xu, Lizhang
Grain separation losses is a key parameter to weigh the performance of combine harvesters, and also a dominant factor for automatically adjusting their major working parameters. The traditional separation losses monitoring method mainly rely on manual efforts, which require a high labor intensity. With recent advancements in sensor technology, electronics and computational processing power, this paper presents an indirect method for monitoring grain separation losses in tangential-axial combine harvesters in real-time. Firstly, we developed a mathematical monitoring model based on detailed comparative data analysis of different feeding quantities. Then, we developed a grain impact piezoelectric sensor utilizing a YT-5 piezoelectric...

3. Análisis de los Circuitos Biosaludables para la Tercera Edad en la provincia de Málaga (España) (Analysis of the Public Geriatric Parks for Elderly People in Málaga (Spain)) - Hernández Aparicio, Elías; Fernández Rodríguez, Emilio; Merino Marbán, Rafael; Chinchilla Minguet, José Luis
El número de parques geriátricos o Circuitos Biosaludables que podemos encontrar en nuestras ciudades o municipios se ha incrementado desde la instalación del primero en 2005. Éstos han sido diseñados para cubrir unas determinadas necesidades y poder retrasar la aparición de los efectos del envejecimiento. El presente trabajo estudia las características y elementos de los Circuitos Biosaludables encontrados en los municipios de la provincia de Málaga. Para ello se ha pasado un cuestionario a los distintos ayuntamientos de las localidades que recogen aspectos sobre su uso, mantenimiento, elección y usuarios a los que está destinado. Además, para analizar su seguridad...

4. 3-Dimensional Finite Element Modeling of Integrated Circuit Capacitances - N. P. Van Der Meijs; A.J. van Genderen
INTRODUCTION With the decrease of feature sizes and the increase of chip dimensions in integrated circuit (IC) technology, the influence of interconnect capacitances on circuit performance is becoming more prominent. Therefore, the need for accurate prediction of interconnect capacitances --- to verify correct functionality of the chip before circuit fabrication, --- increases. At the same time, however, this problem becomes more difficult because lateral dimensions decrease more rapidly than vertical dimensions. As a result, traditional heuristic approaches to estimate the capacitances become inaccurate. Instead, rigorous mathematical techniques are required to model and determine interconnection capacitances. Possible techniques for this include...

5. Two-Frequency C–V Correction Using Five-Element Circuit Model for High-k Gate Dielectric and Ultrathin Oxide - Y. T. Hou; Y. Jin; H. J. Tao; S. C. Chen; M. S. Liang
Abstract—A new circuit model of five elements has been pro-posed for the two-frequency capacitance–voltage (C–V) correc-tion of high-k gate dielectric and ultrathin oxide. This five-element circuit model considered the static and dynamic dielectric losses in a lossy MOS capacitor, the parasitic well/substrate resistance, and the series inductance in the cables and probing system. Each of the circuit elements could be easily extracted from the two-frequency C–V and static current–voltage (I–V) measurements if some criteria are well satisfied. In addition, this model can also be transformed into another two four-element circuit models to sim-plify the analysis and calculations, depending on the...

6. Coupled Electromagnetic-Circuit Simulation of Arbitrarily-Shaped Conducting Structures using Triangular Meshes - Vikram J; Yong Wang; Dipanjan Gope; Richard Shi
The Partial-Element-Equivalent-Circuit (PEEC) approach is an effective method to convert three-dimensional on-chip multi-conductor structures to circuit-level descriptions. In this paper, a triangular-mesh-based PEEC approach is described, wherein the surfaces of arbitrarily-shaped conducting structures are represented by triangular mesh tesselations. A coupled EM-circuit formulation is obtained through the separation of the scalar, vector, and ohmic potential interactions between pairs of triangular edges-based basis functions. The overall approach can be interpreted as a SPICE-free, surface-only version of PEEC method and is especially useful for on-chip signal integrity analysis of systems-on-chip layout where components with irregular shapes are common.

[pt] A imagem contém um indutor desenhado na horizontal.

[pt] A imagem contém um capacitor desenhado na horizontal.

[pt] A imagem contém um resistor desenhado na horizontal.

10. A Parallel Band-Matrix Solver for a Circuit Simulation Problem - Luís Miguel Silveira; Lu'is Miguel Silveira
This report sumarizes and evaluates an implementation of a general band-matrix solver algorithm on a massively parallel multiprocessor, the "Connection Machine". The band algorithm is used in a nonlinear relaxation-based circuit simulator for solving the system of equations associated with the node voltages, at each Newton iteration at each time step. Acknowledgments This report is part of the requisites for course 18.435/6.848, taught by Prof. F. Thomson Leighton at the Massachusetts Institute of Technology in the Fall Term of 1988. I thank Andrew Lumsdaine who wrote the original sequential version of the simulator and did most of the circuit element...

A high pulse and average power low-induction load with a built-in divider is described in this report. The load has a nominal resistance of 25 Ohm and is designed to operate with a repetition rate of up to 50 Hz at the pulse duration (FWHM) of 100 ns, at the rise/fall time of 50 ns and pulse amplitude of up to 40 kV. In this mode the dissipated energy is equal to about 6.4 J per pulse and average power is equal up to 320 W. There is no heat removing from the load resistant layer during one pulse practically...

12. A rational formulation of thermal circuit models for electrothermal simulation. Part I: finite element method - Jia Tzer Hsu; Loc Vu-quoc
Abstract- As the size of the semiconductor devices is getting smaller with advanced technology, self-heating effects in power semiconductor devices are becoming important. An electrother-mal simulation of complete power electronic systems that include Si chips, thermal packages, and heat sinks is essential for an accurate analysis of the behavior of these systems. This paper presents a rational approach to construct thermal circuit net-works equivalent to a discretization of the heat equation by the finite element method. Elemental thermal circuit networks are developed, which correspond to the linear and cubic Hermite elements in the 1-D case, to the triangular and rectangular...

13. Simple way of teaching transistor amplifiers - Bogdan M. Wilamowski
For small signal analysis a simple change from commonly used tranconductance gm to transresistance rm=1/gm leads to a significant simplification of all equations. Moreover these equations are much easier to memorize since they have a form of resistor ratio for CE (CS) and CB (CG) configurations and the form or resistor divider for CC (CD) configuration. With presented approach most of students are able to read diagrams and to understand the effect of each element change on the circuit performance. Students are not lost with messy equations, but they are in control of their design and they know which parameters...

14. How to efficiently capture on-chip inductance effects: introducing a new circuit element K - Anirudh Devgan; Hao Ji; Wayne Dai
On-chip inductance extraction and analysis is becom-ing increasing critical. Inductance extraction can be diffi-cult, cumbersome and impractical on large designs as in-ductance depends on the current return path — which is typically unknown prior to extracting and simulating the circuit model. In this paper, we propose a new circuit ele-ment, K, to model inductance effects, at the same time be-ing easier to extract and analyze. K is defined as inverse of partial inductance matrix L, and has locality and sparsity normally associated with a capacitance matrix. We pro-pose to capture inductance effects by directly extracting and simulating K, instead of...

15. Generating Reduced Order Models via PEEC for Capturing Skin and Proximity Effects - Mattan Kamon; Nuno Marques; L. Miguel Silveira; Jacob White
In the past, model order reduction techniques have been successfully employed for 3-D PEEC interconnect models. This paper explores the difficulties in generating low order models when PEEC-like models include volume filaments to accurately capture skin and proximity effects. 1 Introduction The Partial Element Equivalent Circuit (PEEC) technique has long been used to model three dimensional interconnect structures [1]. In order to simulate the interaction of the interconnect with nonlinear circuit devices such as drivers and receivers, the PEEC model must somehow be incorporated into a time domain circuit simulator such as SPICE. However, inclusion of the PEEC model directly...

16. The Best Approximation of the Field Effects in Electric Circuit Coupled Problems - Daniel Ioan; Irina Munteanu; Irina Munteanu (ieee Members; Cristian-george Constantin
The paper presents a new efficient technique to solve electromagnetic field problems coupled with electric or electronic circuits. It is based on a post-processing algorithm which extracts from the numerical field solution a lumped parameters circuit with imposed complexity, ensuring minimal approximation error. In order to evaluate the algorithm's accuracy a general theory regarding equivalent circuits for quasistationary field effects was developed. The new technique was applied and errors were evaluated in two simple but relevant cases. A practical application (the FLUXSET sensor modeling) is also presented. Index terms---Eddy currents, distributed parameter circuits, approximation methods, identification, magnetic circuits, magnetic field...

17. A Hybrid Element Method For Capacitance Extraction In Vlsi Layout Verification System - E.B. Nowacka; N.P. van der Meijs; N. P. Vd. Meijs
In this paper we describe a hybrid element method which combines the boundary element method (BEM) and the finite element method (FEM) to calculate circuit models for layout dependent capacitances. The method can handle irregularities in the stratification of the layout of the integrated circuits (IC's). We present a stand-alone extraction program which we developed for validation and testing purposes. We show that the hybrid method can be included in our VLSI layout verification package Space. 1 Introduction Parasitic interconnect capacitances in integrated circuits (IC's) are playing an increasingly significant role in the circuit's performance. Therefore, designers of modern IC's...

A series RLC electric circuit with the metal-ferroelectric-semiconductor (MFS) hetero-structure playing the role of nonlinear capacity shows various nonlinear dynamics such as period doubling and Ruelle-Takens scenarios of evolution to chaos. In this paper we present preliminary experimental investigations and theoretical analysis on the dynamics of this structure. We focus only on a period-doubling bifurcation evolution to chaos induced by the change in the amplitude of a sinusoidal driving. A theoretical model of MFS structure as nonlinear element of an electrical circuit justifies a model of two coupled nonlinear Duffing oscillators. The model takes into consideration the presence of two...

19. Floating-Gate MOS Synapse Transistors - Diorio, Chris; Hasler, Paul; Minch, Bradley A.; Mead, Carver
Our goal is to develop silicon learning systems. One impediment to achieving this goal has been the lack of a simple circuit element combining nonvolatile analog memory storage with locally computed memory updates. Existing circuits [63, 132] typically are large and complex; the nonvolatile floating-gate devices, such as EEPROM transistors. typically are optimized for binary-valued storage [17], and do not compute their own memory updates. Although floating-gate transistors can provide nonvolatile analog storage [1, 15], because writing the memory entails the difficult process of moving electrons through Si0_2, these devices have not seen wide use as memory elements in silicon learning systems.

La técnica de impedancia bio-eléctrica permite la caracterización de sistemas biológicos mediante la aplicación de una corriente eléctrica en un rango de frecuencias determinado, logrando así la observación del comportamiento de las propiedades eléctricas, parámetros que están relacionados con la estructura y composición del material. Asimismo, el análisis de la impedancia bio-eléctrica, aplicada a los materiales biológicos, proporciona información acerca de los cambios fisiológicos dentro y fuera de la célula, así como de las membranas y los tejidos. Esta técnica tiene la ventaja de ser simple y no destructiva. Algunos estudios relacionados con esta propiedad se han llevado a cabo...

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