http://biblioteca.universia.net/vernivel.do?start=240&nivel=11 Mostrando recursos 241 - 260 de 88,631 es http://biblioteca.universia.net/img/logotipo.jpg http://biblioteca.universia.net/ http://biblioteca.universia.net/ficha.do?id=47720720 Abstract- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is used as the only design unit for defining any logic function specified by minterms. An algorithm is proposed that does exhaustive branching to reduce the number of levels and/or modules required to implement any logic function. The algorithm identifies a single variable or a function at the control input of the... Rekha K. James; Shahana T. K; K. Poulose; Jacob Sreela Sasi http://biblioteca.universia.net/ficha.do?id=46572097 Input-consuming programs are logic programs with an additional restriction on the selectability (actually, on the resolvability) of atoms. This class of programs arguably allows to model logic programs employing a dynamic selection rule and constructs such as delay declarations: as shown also in [5], a large number of them are actually input-consuming. In this paper we show that -- under some syntactic restrictions -- the S-semantics of a program is correct and fully abstract also for input-c... Annalisa Bossi; Sandro Etalle; Sabina Rossi http://biblioteca.universia.net/ficha.do?id=46201511 This paper deals with the problem of uniqueness of reconstruction in Open Logic by introducing the concept of total-ordered partitions, an ordering structure modeling belief degrees of knowledge, and redefining the reconstruction operation. Based on the resulting definition, a nontrivial condition for the convergency of cognitive processes is given. It is shown that if new knowledge is not always accepted with an extremely skeptical attitude and the changes of belief degrees follow the criter... Zhang Dongmo; Li Wei http://biblioteca.universia.net/ficha.do?id=46378929 We describe and discuss the applications of a logic programming language called Lygon. This language is based on linear logic, a logic designed with bounded resources in mind. Linear logic may be thought of as a generalisation of classical logic, and as a result Lygon contains various features which do not exist in (pure) Prolog, whilst maintaining all the features of (pure) Prolog. In this paper we describe various applications of this language, which include graph problems, and problems inv... Michael Winikoff; James Harland http://biblioteca.universia.net/ficha.do?id=46675663 We describe and discuss the applications of a logic programming language called Lygon. This language is based on linear logic, a logic designed with bounded resources in mind. Linear logic may be thought of as a generalisation of classical logic, and as a result Lygon contains various features which do not exist in (pure) Prolog, whilst maintaining all the features of (pure) Prolog. In this paper we describe various applications of this language, which include graph problems, and problems inv... Michael Winikoff; James Harland http://biblioteca.universia.net/ficha.do?id=47205460 We describe and discuss the applications of a logic programming language called Lygon. This language is based on linear logic, a logic designed with bounded resources in mind. Linear logic may be thought of as a generalisation of classical logic, and as a result Lygon contains various features which do not exist in (pure) Prolog, whilst maintaining all the features of (pure) Prolog. In this paper we describe various applications of this language, which include graph problems, and problems inv... Michael Winikoff; James Harland http://biblioteca.universia.net/ficha.do?id=46533320 We describe and discuss the applications of a logic programming language called Lygon. This language is based on linear logic, a logic designed with bounded resources in mind. Linear logic may be thought of as a generalisation of classical logic, and as a result Lygon contains various features which do not exist in (pure) Prolog, whilst maintaining all the features of (pure) Prolog. In this paper we describe various applications of this language, which include graph problems, and problems inv... Michael Winikoff; James Harland http://biblioteca.universia.net/ficha.do?id=41827592 We first describe a metric for uncertain probabilities called opinion, and subsequently a set of logical operators that can be used for logical reasoning with uncertain propositions. This framework which is called subjective logic uses elements from the Dempster-Shafer belief theory and we show that it is compatible with binary logic and probability calculus. http://biblioteca.universia.net/ficha.do?id=41698060 Bilattices, introduced by M. Ginsberg, constitute an elegant family of multiple-valued logics. Those meeting certain natural conditions have provided the basis for the semantics of a family of logic programming languages. Now we consider further restrictions on bilattices, to narrow things down to logic programming languages that can, at least in principle, be implemented. Appropriate bilattice background information is presented, so the paper is relatively self-contained. 1 Introduction Logi... http://biblioteca.universia.net/ficha.do?id=46889933 Introduction The aim of the whole meeeting, organized by Krzysztof Apt (president of the Association of Logic Programming) , Wiktor Marek, Mirek Truszczynski and David Warren, was to get a clear picture of the current activities in Logic Programming and its role in the coming years. In the organizers' words: The aim of the meeting was -- to present current research directions in Logic Programming worldwide, -- to analyse future research directions, -- to boost Logic Programming in No... J Urgen Dix; Jürgen Dix http://biblioteca.universia.net/ficha.do?id=418956 This paper describes some experiments involving the automated theorem-proving program OTTER in the system TRC of illative combinatory logic. We show how OTTER can be steered to find a contradiction in an inconsistent variant of TRC, and present some experimentally discovered identities in TRC. Jech, Thomas http://biblioteca.universia.net/ficha.do?id=44778623 The aim of this paper is to provide a methodology for turning a known crisp logic into a fuzzy system. We require of the methodology that it be meaningful in general terms, using processes which are independent of the notion of fuzziness, and that it yield a considerable number of known fuzzy systems. Gabbay, Dov M. http://biblioteca.universia.net/ficha.do?id=44779326 BL-algebras [Hajek] rise as Lindenbaum algebras from certain logical axioms familiar in fuzzy logic framework. BL-algebras are studied by means of deductive systems and co-annihilators. Duals of many theorems known to hold in MV-algebra theory remain valid for BL-algebras, too. Turunen, Esko http://biblioteca.universia.net/ficha.do?id=22158893 The paper gives a soundness and completeness proof for the implicative fragment of intuitionistic calculus with respect to the semantics of computability logic, which understands intuitionistic implication as interactive algorithmic reduction. This concept — more precisely, the associated concept of reducibility — is a generalization of Turing reducibility from the traditional, input/output sorts of problems to computational tasks of arbitrary degrees of interactivity. Japaridze, Giorgi http://biblioteca.universia.net/ficha.do?id=44827705 El presente trabajo explora la relación en tre los conceptos de lógica de la dominación y potencia so cial, en tre lo instituido y lo instituyente, en el pensamiento de Michel Maffesoli. Una relación que resulta fun da men tal en la obra de este sociólogo porque le permite establecer un marco de análisis de la vida política de las sociedades modernas. A partir de aquí se expone el diagnóstico maffesoliano de las democracias occidentales contemporáneas, así como su propuesta de organización so... Arteaga Botello, Nelson http://biblioteca.universia.net/ficha.do?id=46363591 The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of signals. One of the crucial problems in the synthesis of such circuits is deriving equations for logic gates implementing each output signal of the circuit. This is usually done using reachability graphs. V. Khomenko; M. Koutny; Maciej Koutny; A. Yakovlev http://biblioteca.universia.net/ficha.do?id=45653920 The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of signals. One of the crucial problems in the synthesis of such circuits is deriving equations for logic gates implementing each output signal of the circuit. This is usually done using reachability graphs. Victor Khomenko; Maciej Koutny; Alex Yakovlev http://biblioteca.universia.net/ficha.do?id=41763204 4> e), where e can be any integer expression. The theorem 8X(X = pred(succ(X))) can be had without also engendering the nonsensical 5=0 = pred(succ(5=0)) because 9X(X = 5=0) is not a theorem. With free arithmetic underlying Hoare logic, the total correctness axiomatization for while programs proceeds naturally. For example, the Assignment Axiom is fp[x / e]&9X(X = e)gy := efpg and the Conditional Rule mandates that, in addition to the usual requirements, we must establish in free arithmetic `... Raymond D. Gumb http://biblioteca.universia.net/ficha.do?id=420403 It is shown that the proof theory for sketches and forms provided in Part I of this paper (see http://www.cwru.edu/1/class/mans/math/pub/wells) is strong enough to produce all the theorems of the entailment system for multisorted equational logic provided in Goguen and Meseguer's article ``Completeness of many-sorted equational logic'' (Technical Report CSL-135, SRI International Computer Science Laboratory, 333 Ravenswood Ave., Menlo Park, CA 94025, USA, 1982). Bagchi, Atish; Wells, Charles http://biblioteca.universia.net/ficha.do?id=46889921 A new logic family, Differential Current Switch Logic (DCSL) for implementing clocked CMOS circuits has been developed. DCSL is in principle a clocked differential cascode voltage switch logic circuit (DCVS). The circuit topology outlines a generic method for reducing internal node swings in clocked DCVS logic circuits. In comparison to other forms of clocked DCVS, DCSL achieves better performance both in terms of power and speed by restricting internal voltage swings in the NMOS tree. DCSL c... Dcvs Logic Family; Dinesh Somasekhar; Kaushik Roy